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RT-Thread
so easy (0 ratings)  •  Last indexed on
lock

spin_lock_irqsave(&chip->lock, flags);

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reg = GET_REG(base + REG_GPIO_SWPORTA_DDR);
    reg &= ~(1 << gpio);
    SET_REG(base + REG_GPIO_SWPORTA_DDR, reg);
    //spin_unlock_irqrestore(&chip->lock, flags);

    return 0;
}

int gpio_direction_output(rt_uint32_t gpio, rt_uint32_t val)
{
    rt_uint32_t reg, base;

    if(gpio > NUM_OF_GPIO)
    {
        rt_kprintf("ERROR: %s, incorrect GPIO num\n", __func__);
        return -RT_ERROR;
RT-Thread
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spin lock???

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base = (irq==40) ? GPIO0_REG_BASE : GPIO1_REG_BASE;

    irq_status = GET_REG(base + REG_GPIO_INTSTATUS);

    if (irq_status == 0) {
        rt_kprintf("gpio irq status is zero.\n");
        return;
    }

    /* temporarily mask (level sensitive) parent IRQ */
    gpio_irq_mask(irq);

    gpio_num = __rt_ffs(irq_status) - 1;

    SET_REG(base + REG_GPIO_PORTA_EOI, BIT(gpio_num));
RT-Thread
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never release?

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}
#if(0)
#define TEST_SPI_BUFF_SIZE			0x100
static rt_uint8_t tx_buf[TEST_SPI_BUFF_SIZE] = {0};
static rt_uint8_t rx_buf[TEST_SPI_BUFF_SIZE] = {0};
int ssi_test(void){
	struct rt_spi_device * rt_spi_device;

	int ret;
	rt_spi_device = (struct rt_spi_device *)rt_device_find("ssi1_0");

	if(rt_spi_device == RT_NULL)
	{
		rt_kprintf("%s spi device %s not found!\r\n",__func__ ,"ssi1_0");
		return -RT_ENOSYS;
	}
RT-Thread
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unregister spi_bus...

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error_malloc_bus:
	return -RT_ENOMEM;





}

int fh_spi_exit(void *priv_data)
{

    struct spi_controller *spi_control;
    struct spi_control_platform_data *plat_data;
    struct spi_slave_info *spi_slave;
    struct spi_slave_info *next_slave;
RT-Thread
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handle error

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return;
	}

	rx_fifo_capability = SPI_ReadRxFifoLevel(spi_obj);
	tx_fifo_capability = MIN(
			(SPI_FIFO_DEPTH - SPI_ReadTxFifoLevel(spi_obj)) / 2,
			(spi_control->current_message->length - spi_control->transfered_len));


	PRINT_SPI_DBG("rx_fifo_capability=%d\n", rx_fifo_capability);

	//rx
	spi_control->received_len += rx_fifo_capability;
	while(rx_fifo_capability)
	{
		data = SPI_ReadData(spi_obj);
RT-Thread
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??recv overflow, underflow; tran overflow??

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if(status & SPI_ISR_ERROR){
		rt_kprintf("ERROR: %s, status=%d\n", __func__, status);
		SPI_ClearInterrupt(spi_obj);
		//fixme: handle error
		return;
	}

	rx_fifo_capability = SPI_ReadRxFifoLevel(spi_obj);
	tx_fifo_capability = MIN(
			(SPI_FIFO_DEPTH - SPI_ReadTxFifoLevel(spi_obj)) / 2,
			(spi_control->current_message->length - spi_control->transfered_len));


	PRINT_SPI_DBG("rx_fifo_capability=%d\n", rx_fifo_capability);

	//rx
RT-Thread
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div

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config->clk_div = spi_control->clk_in/spi_hz;
	//config->clk_div = 8;
	PRINT_SPI_DBG("config hz:%d spi div:%d\n",spi_hz,config->clk_div);
	/* CPOL */
	if(configuration->mode & RT_SPI_CPOL){
	  config->clk_polarity = SPI_POLARITY_HIGH;
	}
	else{
	  config->clk_polarity = SPI_POLARITY_LOW;
	}

	/* CPHA */
	if(configuration->mode & RT_SPI_CPHA){
	  config->clk_phase = SPI_PHASE_TX_FIRST;
	}
	else{
RT-Thread
so easy (0 ratings)  •  Last indexed on

max_blk_count?

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host->max_blk_count = 2048;
    host->private_data = mmc_drv;

    mmc_drv->host = host;
    gpio_request(mmc_obj->power_pin_gpio);
    gpio_direction_output(mmc_obj->power_pin_gpio, 0);

    MMC_Init(mmc_obj);

    if(mmc_obj->id == 0){
        rt_hw_interrupt_install(mmc_obj->irq, fh_mmc_interrupt, (void *)mmc_drv, "mmc_isr_0");
    }
    else if(mmc_obj->id == 1){
        rt_hw_interrupt_install(mmc_obj->irq, fh_mmc_interrupt, (void *)mmc_drv, "mmc_isr_1");
    }
RT-Thread
so easy (0 ratings)  •  Last indexed on

handle sdio

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//mmc_signal_sdio_irq ?
    }

    if(status & MMC_INIT_STATUS_DATA_ERROR)
    {
        rt_kprintf("ERROR: %s, data error, status: 0x%x\n", __func__, status);
    }

    if (status & MMC_INT_STATUS_TRANSFER_OVER)
    {
        //MMC_ResetFifo(mmc_obj);
        //rt_completion_done(&mmc_drv->transfer_completion);
    }

    if (status & MMC_INT_STATUS_TX_REQUEST)
    {
RT-Thread
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error handle

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cmd->err = ret;
        interrupt = MMC_GetRawInterrupt(mmc_obj);
        status = MMC_GetStatus(mmc_obj);
        rt_kprintf("ERROR: %s, transfer timeout, ret: %d, RINTSTS: 0x%x, STATUS: 0x%x\n", __func__, ret, interrupt, status);
        //PRINT_MMC_REGS(mmc_obj->base);
        return -RT_ETIMEOUT;
    }

    data->bytes_xfered = data->blks * data->blksize;

#ifdef MMC_USE_INTERNAL_BUF
    if (!(data->flags & DATA_DIR_WRITE))
    {
        rt_memcpy(data->buf, g_mmc_dma_buf, data->bytes_xfered);
        mmu_invalidate_dcache(g_mmc_dma_buf, data->bytes_xfered);
    }